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 PD - 95950
AUTOMOTIVE MOSFET
IRFR48ZPBF IRFU48ZPbF
HEXFET(R) Power MOSFET
D
Features
l l l l l l
Description
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
VDSS = 55V RDS(on) = 11m
G S
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
ID = 42A
D-Pak IRFR48Z
Max.
62 44 42 250 91 0.61 20
I-Pak IRFU48Z
Units
A
Absolute Maximum Ratings
Parameter
I D @ T C = 25C Continuous Drain Current, V GS @ 10V (Silicon Limited) I D @ T C = 100C Continuous Drain Current, V GS @ 10V I D @ T C = 25C I DM Continuous Drain Current, V GS @ 10V (Package Limited) Pulsed Drain Current
P D @T C = 25C Power Dissipation V GS Linear Derating Factor Gate-to-Source Voltage
W W/C V mJ A mJ
E AS (Thermally limited) Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value E AS (Tested ) I AR E AR TJ T STG Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
h
74 110 See Fig.12a, 12b, 15, 16 -55 to + 175
g
C 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
R JC R JA R JA Junction-to-Case
j
Parameter
Typ.
Max.
1.64 40 110
Units
C/W
Junction-to-Ambient (PCB mount) Junction-to-Ambient
HEXFET(R) is a registered trademark of International Rectifier.
j
ij
--- --- ---
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1
12/20/04
IRFR/U48ZPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
55 --- --- 2.0 120 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.054 8.86 --- --- --- --- --- --- 40 11 15 15 61 40 35 4.5 7.5 1720 290 160 1000 230 360 --- --- 11 4.0 --- 20 250 200 -200 60 --- --- --- --- --- --- --- nH --- --- --- --- --- --- --- pF ns nC nA V m V S A
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 37A VDS = 25V, ID = 37A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 37A VDS = 44V VGS = 10V VDD = 28V ID = 37A RG = 12 VGS = 10V
V/C Reference to 25C, ID = 1mA VDS = VGS, ID = 50A
e
e e
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz
G
D
S
VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 44V, = 1.0MHz VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 20 14 37 A 250 1.3 40 28 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 37A, VGS = 0V TJ = 25C, IF = 37A, VDD = 28V di/dt = 100A/s
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U48ZPbF
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
4.5V 10
10 4.5V
60s PULSE WIDTH
1 0.1 1 Tj = 25C
60s PULSE WIDTH
1 Tj = 175C 0.1 1 10 100
10
100
V DS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
60
Gfs , Forward Transconductance (S)
ID, Drain-to-Source Current ()
50 40 30 20 10 0 0 20
100 T J = 175C 10
TJ = 25C
TJ = 175C
1
T J = 25C VDS = 25V 60s PULSE WIDTH 2 4 6 8 10 12
VDS = 10V 380s PULSE WIDTH 40 60 80
0.1
VGS, Gate-to-Source Voltage (V)
ID,Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRFR/U48ZPbF
10000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
20
VGS, Gate-to-Source Voltage (V)
ID= 37A VDS = 44V VDS= 28V VDS= 11V
16
C, Capacitance(pF)
Ciss
1000
12
Coss Crss
8
4
0
100 1 10 100
0
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000.00
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
100.00 TJ = 175C 10.00
100 100sec 10 1msec 1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 VDS , Drain-toSource Voltage (V) 100 10msec
1.00
TJ = 25C VGS = 0V 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD , Source-to-Drain Voltage (V)
DC
0.10
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U48ZPbF
70 LIMITED BY PACKAGE 60
ID , Drain Current (A)
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 37A VGS = 10V
2.0
50 40 30 20 10 0 25 50 75 100 125 150 175 TC , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20 0.10
0.1
0.05 0.02 0.01
J
R1 R1 J 1 2
R2 R2
R3 R3 3 C 3
Ri (C/W) 0.7206 0.6009 0.3175
i (sec) 0.000326 0.001810 0.014886
1
2
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01 0.1
0.001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U48ZPbF
EAS, Single Pulse Avalanche Energy (mJ)
15V
300
250
VDS
L
DRIVER
ID 4.3A 6.3A BOTTOM 37A
TOP
200
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
150
0.01
100
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
50
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
5.0
VG
4.5
4.0
Charge
3.5
Fig 13a. Basic Gate Charge Waveform
3.0
2.5
2.0
L
0
ID ID ID ID ID
= 1.0A = 50A = 150A = 250A = 1.0mA
DUT 1K
VCC
1.5
1.0
-75
-50
-25
0
25
50
75
100 125 150 175
T J , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRFR/U48ZPbF
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
0.05 0.10
1
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
80
EAR , Avalanche Energy (mJ)
60
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 37A
40
20
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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7
IRFR/U48ZPbF
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U48ZPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WIT H AS S EMBLY LOT CODE 1234 AS S EMBLED ON WW 16, 1999 IN THE AS S EMBLY LINE "A" Note: "P" in ass embly line position indicates "Lead-Free" INT ERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
IRFU120 12 916A 34
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
INT ERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
IRFU120 12 34
DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = AS S EMBLY S IT E CODE
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9
IRFR/U48ZPbF
I-Pak (TO-251AA) Package Outline
I-Pak (TO-251AA) Part Marking Information
E XAMPL E : T H IS IS AN IRF U 120 WIT H AS S E MB L Y L OT CODE 5678 AS S E MB L E D ON WW 19, 1999 IN T H E AS S E MB L Y L INE "A" Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
IR F U 120 919A 56 78
DAT E CODE YE AR 9 = 1999 WE E K 19 L INE A
OR
INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
IRF U120 56 78
DAT E CODE P = DE S IGNAT E S L E AD-F R E E PR ODU CT (OPT IONAL ) YE AR 9 = 1999 WE E K 19 A = AS S E MB L Y S IT E CODE
10
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IRFR/U48ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters
TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.11mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25, IAS = 37A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width 1.0ms; duty cycle 2%. tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ approximately 90C Repetitive rating; pulse width limited by Data and specifications subject to change without notice. This product has been designed for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04
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11


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